HQ = e.g. 3000C14, 3200C15, 3600C16, 3600C17 rated B-die kits
UHQ = e.g. 3200C14, 3600C15 rated B-die kits
These timings are stable on my 3600C15 kit with < 1.350V voltage (1.340V bios setting).
In 3200MHz "Fast" example, tCL 13 would be otherwise doable (this kit is rated 13.333 CLK tCL-tRCD-tRP timings at 3200MHz) however AGESA issue affecting tCWL prevents using it at the moment.
For the best real world performance disable both BankGroupSwap and BankGroupSwapAlternative options, when using 1 DPC SR modules.
Few more DRAM timing presets:
Hynix AFR, 1DPC SR
"Safe"
- ProcODT 60 Ohms
- DRAM Voltage / DRAM Boot Voltage 1.340V (keep these syncronized at all times)
- VDDCR_SOC 1.025V
"Extreme"
- ProcODT 60 Ohms
- DRAM Voltage / DRAM Boot Voltage 1.405V (keep these syncronized at all times)
- VDDCR_SOC 1.025V
Hynix MFR, 1DPC SR
"Safe"
- ProcODT 60 Ohms
- DRAM Voltage / DRAM Boot Voltage 1.365V (keep these syncronized at all times)
- VDDCR_SOC 1.025V
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